1. Field of the Invention
This invention relates to electronic oscillators, and more particularly to a circuit and method for a multi-phase voltage controlled oscillator (VCO). Described herein are means for creating a VCO with multiple outputs, all operating at the same frequency, but each having a different phase relationship. For example, in an embodiment disclosed herein, the VCO generates four sine wave outputs at the same frequency and phase offsets of 0xc2x0, 90xc2x0, 180xc2x0 and 270xc2x0. This configuration-is referred to as a xe2x80x9cquadrature oscillator.xe2x80x9d Oscillators having multiple phase outputs (i.e., multi-phase oscillators) are useful in applications such as clock recovery circuits incorporating phase-locked loops (PLLs) or delay-locked loops (DLLs). In some cases, it is possible to operate the PLL (or DLL) and the associated VCO at lower frequencies, if the VCO is capable of generating multiple output phases. This is advantageous, since the lower frequency circuitry is generally easier to design and cheaper to manufacture. The circuit and method disclosed herein support the generation of clock signals of four, eight, or arbitrarily many output phases, while overcoming many disadvantages inherent in conventional multi-phase oscillators.
2. Description of the Related Art
Modern high-speed data communications systems typically employ internal clock-referenced circuitry. It is often necessary for such circuitry to adjust its own operating frequency to match that of an incoming data stream. For example, a SONET bit stream is considered isonchronous with respect to the internal clock rate of a node receiving the stream. This means that, although their average clock rates are very close, the bit stream data rate is not actually synchronized with the circuitry in the SONET node. To achieve synchronization, the node adjusts its internal clock slightly to match the bit stream data rate. This is accomplished by a clock recovery circuit, which derives the necessary clock rate from the bit stream. Such circuits generally employ PLLs, or DLLs.
In its most basic form, a PLL consists of a variable oscillator combined with phase detection and control circuitry. The signal generated by the oscillator is continuously compared against an incoming clock signal, and the control circuitry adjusts the oscillator output frequency so the incoming clock signal and oscillator output are in phase. A PLL may be used, for example, to synchronize logic local to the PLL with the frequency and/or phase of an external clock signal, as may be required for data communications.
In contrast, a DLL contains a variable delay line combined with delay detection and control circuitry. A reference clock is supplied to both the variable delay in the DLL and to a clock distribution network in the external circuitry. The DLL control circuitry compares the clock signal fed back from the distribution network against the output of the variable delay, and then adjusts the variable delay until the two clocks match. In this manner, a DLL can compensate for the delay in the clock distribution network.
In clock recovery systems, or other high-speed applications employing PLLs or DLLs, it is often convenient or beneficial to use a multi-phase clock. For example, the phase detector in a typical clock recovery circuit requires both the rising and falling edges of an incoming clock (e.g., clock to be recovered) to achieve synchronization. Therefore, with a single-phase clock signal, the clock rate must equal the data rate of the incoming bit stream. If the clock generates multiple phases, however, the clock rate may be reduced, while still permitting the phase detector to accurately track the effective bit rate of the incoming data. SONET bit streams may have bit rates as high as 10 Gbps, or even 40 Gbps (e.g., SONET/SDH standard OC-192 specifies a transmission rate of 9953.28 Mbit/s, and OC-768 specifies a transmission rate of 39813.12 Mbit/s). Consequently, the PLL and other components of the clock recovery circuit are significantly simpler with a multi-phase oscillator than. with one providing only a single output phase. For the purposes of this specification, an oscillator with outputs at 0xc2x0 and 180xc2x0 (i.e., a differential output) will be considered a two-phase oscillator.
There is a simple way to derive a multi-phase oscillator from a single-phase oscillator. A single-phase oscillator can be run at a multiple of the desired frequency and its output divided down and separated into multiple phases using standard logic. For example, to create a 100 MHz four-phase oscillator, one could start with a single-phase oscillator running at 200 MHz. The 200 MHz output of this oscillator could be coupled to a divide-by-two counter. The two complementary outputs of each flip-flop would then yield a differential pair of 100 MHz waveforms (i.e., 180xc2x0 out of phase with each other) that were 90xc2x0 out of phase with the respective outputs of the other flip-flop.
Unfortunately, it is not always a simple matter to run the oscillator and the divider at twice (or more) the necessary frequency. Furthermore, the phase/frequency detectors used in some clock recovery circuits require as many as 4 or 8 phases. Using the above approach, it would be necessary to start with a oscillator running at 8 times the bit rate, which may be impractical, if the targeted bit rate is quite high. In such cases, there is no alternative but to create an oscillator that.directly generates the multi-phase signals.
There are a variety of ways to create a multi-phase oscillator without multiplying and thereafter dividing the oscillator output. A classic approach, known as a RC ring oscillator, consists of series-connected phase shift stages, in which the combined phase shift is sufficient to achieve oscillation at the desired operating frequency. For example, a quadrature RC ring oscillator can be formed by connecting four stages in series, each stage having a phase shift of 90xc2x0 at the desired frequency. By connecting the inverted output of the fourth stage to the input of the first, an overall phase shift of 360xc2x0 results. If there is enough gain, the RC ring oscillator will sustain oscillation. During oscillation, each stage of the RC ring oscillator produces an output signal at a frequency determined by the RC networks, with a phase angle that is a multiple of 90xc2x0. Although this technique is straightforward, it tends to be noisy and lacks sufficient frequency stability for many applications.
A better approach, the LC ring oscillator, uses both inductors and capacitors in the phase shift stages. (xe2x80x9cLCxe2x80x9d oscillators are so named because the traditional symbols for inductance and capacitance are L and C, respectively). Each LC combination has a characteristic resonant frequency. At the resonant frequency the impedance of the LC network becomes real (since, at resonance, the inductive and capacitive reactance become equal in magnitude and opposite in sign, and therefore, cancel). An LC ring oscillator will preferentially oscillate at the resonant frequency of the LC networks in its stages. The LC combination is often referred to as a xe2x80x9ctank circuitxe2x80x9d, and the resonant frequency is based on the component values in the tank:       f    R    =      1          2      ⁢      π      ⁢              LC            
where fR is the resonant frequency (in Hertz), L is the inductance (in Henries), and C is the capacitance (in Farads). When operated at its natural resonant frequency, the frequency stability of a properly designed LC ring oscillator is inherently better than that of oscillators based on RC phase shift networks. This is because the rate of change of phase with respect to frequency is much greater for the LC tank circuit than for an RC circuit. In order to generate multiple output phases, however, LC ring oscillators are typically not operated at the exact resonant frequency, but are slightly xe2x80x9cdetuned.xe2x80x9d As a result, their frequency stability is no better than that of an RC ring oscillator, and may limit their performance in high-speed clock recovery applications.
A further consideration with regard to multi-phase oscillators is frequency modulation. As in the case of the SONET node discussed earlier, it is often necessary to adjust the frequency of the oscillator. This is conventionally done through the inclusion of a variable reactive component (i.e., inductance or capacitance) in the tank circuit of the oscillator. In the above equation, the resonant frequency is inversely proportional to the product of the inductance and capacitance; therefore, varying either the capacitance or the inductance changes the operating frequency of the oscillator. When the variable reactive component is voltage-dependent, the frequency of the oscillator may be adjusted through the application of an external control voltage. This is a basic form of voltage controlled oscillator (VCO).
While voltage-dependent inductors are uncommon, voltage-dependent capacitors are widely used in VCOs, voltage-controlled filters, etc. The most common form of voltage-dependent capacitor is the varactor. A varactor is a semiconductor junction that is biased in the reverse direction and can be tuned over a range of capacitance by varying its junction voltage. The varactor is convenient to use, and its capacitance can be adjusted over a ratio of up to 2:1. Despite these advantages, there are some undesirable characteristics of a varactor tuned VCO, which may render them unsuitable for certain applications. For one thing, the tuning range is a function of the square root of the total capacitance, which includes parasitic capacitances. Parasitic capacitance is typically associated with the device interconnect wiring and cannot be completely eliminated. Furthermore, the parasitic capacitance may be comparable in size to the junction capacitance of the varactor. For example, when one sets out to fabricate a varactor with a nominal tuning range of 4-8 pF, the actual device may have parasitics of as much as 4 pF, making the total tuning range of the capacitance 8-12 pF. This effectively reduces the practical tuning range of the varactor to {square root over (12/8)}≅1.22.
Although laser trimming can often he employed to xe2x80x9ctweakxe2x80x9d the varactor for the desired range, this adds to the cost of manufacturing the integrated circuit. Furthermore, since varactors are not purely capacitive, their resistive component can degrade the xe2x80x9cQxe2x80x9d of an LC circuit, thereby diminishing the frequency stability of the oscillator. Moreover, the capacitance vs. voltage characteristic of the varactor is nonlinear, which complicates the design of frequency control circuitry in the oscillator.
It would be desirable to have a multi-phase oscillator circuit using LC components that overcomes the aforementioned drawbacks. The desired oscillator should be capable of operating at its resonant frequency, for optimum frequency stability. The design of the oscillator should be such that it may be readily fabricated upon and within a common substrate, as an integrated circuit. Furthermore, it should be possible to adapt its principles of operation to achieve other desired numbers of output phases.
In addition, it would also be desirable to have a means of modulating the frequency of oscillation, while avoiding many of the problems associated with varactor tuning. It would be particularly advantageous to have a wide tuning range, and a frequency vs. voltage tuning characteristic that is substantially linear. In addition, the modulation circuitry should minimize any degradation of the frequency stability of the oscillator.
The problems outlined above may be addressed by a circuit and method disclosed herein for a multi-phase LC oscillator. The present oscillator may have 4 or 8 phases, or alternatively, more than 8 phases. The circuit disclosed herein is believed to offer advantages over conventional oscillators, in that it avoids de-tuning the resonant stages to achieve the necessary inter-stage phase shift. Instead, a phase-shifted signal derived from the LC circuit of each stage is amplified and used (possibly in combination with phase-shifted signals from other stages) to drive the following stage. This mode of operation permits the LC circuits to be operated at their resonant frequency, so frequency stability is optimized.
An N-stage LC oscillator circuit is disclosed herein. The N stages are series-connected, in a ring configuration. Each stage contains an LC circuit and an amplifier, and the amplifier in each stage receives a quadrature signal from at least one other stage. Thus, the signal with which the amplifier drives its associated LC circuit has a phase offset, relative to the at least one other stage. If the oscillator has N stages, the nth stage has a phase offset of nxc3x97(360xc2x0÷N). Additional gain is obtained from the amplifier in each stage, by coupling to it a signal that is 180xc2x0 out of phase with the drive signal to the LC circuit.
A circuit for modulating the frequency of the N-stage multi-phase oscillator is also disclosed herein. The circuit does not rely on the use of varactors or other similar voltage-controlled reactance devices to adjust the oscillator frequency. Instead, a voltage-controlled transconductance amplifier couples a quadrature current into the LC circuit of each oscillator stage. The quadrature current is at the same frequency, but has a phase angle of either +90xc2x0 or xe2x88x9290xc2x0 with respect to the voltage across the LC circuit. Increasing the amplitude of a quadrature signal with a phase angle of xe2x88x9290xc2x0 causes the operating frequency of the oscillator to increase above the resonant frequency of the LC circuit; increasing the amplitude of a quadrature signal with a phase angle of +90xc2x0 causes operating frequency of the oscillator to decrease below the resonant frequency of the LC circuit. The phase angle and amplitude of the quadrature signal are both determined by the voltage-controlled transconductance amplifier, which is based on a Gilbert cell analog multiplier.
A method for obtaining N phases from an LC oscillator is also disclosed herein. The method entails series-connecting N identical oscillator sections in a ring configuration, where each section contains an amplifier driving an LC circuit. A quadrature signal is generated from the LC circuit of each oscillator section, where the quadrature signal is 90xc2x0 out of phase with the voltage across the LC circuit. The method further entails combining one or more of the quadrature signals from other oscillator sections in the amplifier that drives the LC circuit in a given section. According to this method, the phase angle of the voltage across the LC circuit in the nth oscillator section is nxc3x97(360xc2x0÷N). The method further discloses coupling to the amplifier in each section a signal that is 180xc2x0 out of phase with the drive signal to the LC circuit, thus obtaining additional gain from the amplifier.
A method for modulating the frequency of an LC oscillator is also disclosed herein. The method entails coupling a variable amplitude quadrature signal into the LC circuit of the oscillator. With respect to the voltage across the LC circuit, the quadrature signal has the same frequency and a phase angle of +90xc2x0 or xe2x88x9290xc2x0. According to the method, increasing the amplitude of a xe2x88x9290xc2x0 quadrature signal increases the operating frequency of the oscillator above the resonant frequency of the LC circuit, while increasing the amplitude of a +90xc2x0 quadrature signal decreases the operating frequency. In an embodiment of the method, a Gilbert cell-type transconductance amplifier controls the sign and amplitude of the quadrature signal.